In front-end-of-line (FEOL) chip manufacturing processes, scanning electron microscopy (SEM) is widely used for quality inspection and process diagnostics in key steps such as lithography, etching, and thin-film deposition. It can detect open circuits, short circuits, and bridging in interconnects, as well as pattern defects from lithography and etching processes. It can evaluate film thickness, coverage quality, and step coverage, and accurately determine the position and depth of PN junctions. For advanced transistor structures such as FinFETs and gate-all-around (GAA) devices, high-resolution imaging enables the characterization of nanometer-scale feature sizes.
